The present invention relates to a semiconductor device used in semiconductor integrated circuits and the method for manufacturing the semiconductor device. Specifically, the invention relates to a semiconductor device that has a multilayered electrode structure including a metal electrode wiring laminate formed on a semiconductor substrate and having a predetermined wiring pattern. The metal electrode wiring laminate includes an undercoating barrier metal laminate and an aluminum film or an aluminum alloy film formed on the undercoating barrier metal laminate. The metal electrode wiring laminate is covered with a passivation film. Specifically, the invention further relates to the method for manufacturing the semiconductor device having the multilayered electrode structure described above.
The method for manufacturing the semiconductor device having a conventional multilayered electrode structure will be described below focusing especially on the method for forming the conventional multilayered electrode structure relevant to the present invention. The conventional multilayered electrode structure includes a metal electrode wiring laminate including a barrier metal laminate, formed of a Ti film and a TiN film, and an Al—Si alloy film on the barrier metal laminate. An organic passivation film formed of a polyimide film is coated on the metal electrode wiring laminate.
The manufacturing process flow, along which the manufacture of the conventional multilayered electrode structure, will be described with reference to FIGS. 3(a) through 3(e) and FIGS. 4(f) through 4(i). In the following descriptions, titanium, aluminum and silicon will be designated sometimes by the respective atomic symbols, Ti, Al and Si.
As described in FIG. 3(a), Ti film 3 and TiN film 4 are formed by sputtering as the constituent films of the barrier metal laminate in the order of the above descriptions thereof from the side of a silicon substrate, in which semiconductor functional regions not shown are formed. An Al—Si alloy film 2 is then laminated on TiN film 4 (step (a)). A photoresist 1 is formed on Al—Si alloy film 2 and photoresist 1 is patterned as described in FIG. 3(b) to form a predetermined wiring pattern (step (b)). Then, Al—Si alloy film 2 is etched by wet etching with a mixed acid (nitric acid:acetic acid:phosphoric acid=1-10:1-20:10-40 (in the volume ratio)) at a liquid temperature of 40-80□ using patterned photoresist 1 as a mask. As described in FIG. 3(c), Al—Si alloy film 2 is side-etched to the underside of photoresist 1 working as a mask. Si nodules 5 (Si particles and such particle residues caused by etching Al—Si alloy film 2) shown by open circles in FIG. 3(c) remain on the barrier metal laminate surface, from which Al—Si alloy film 2 is removed by the etching. Si nodules 5 are caused also in the aluminum alloy film (step (c)). The Si nodules 5, which remain on the barrier metal laminate surface, are removed as described in FIG. 3(d) by plasma etching using a fluorine-containing gas as a main etching gas. The plasma etching conditions include the CF4 gas flow rate of 100 to 500 sccm, the O2 gas flow rate of 5 to 50 sccm, the pressure inside a chamber of 66.66 to 199.98 Pa, the plasma electric power of 0.2 to 2.0 W/cm2, and the wafer temperature of 30 to 90□ (step (d)). Then, as described in FIG. 3(e), Ti film 3 and TiN film 4 are etched and removed by dry etching with a chlorine-containing gas as a main etching gas using photoresist 1 for a mask. The dry etching conditions include the BCl3 gas flow rate of 30 to 80 sccm, the Cl2 gas flow rate of 30 to 80 sccm, the N2 gas flow rate of 0 to 30 sccm, the pressure inside a chamber of 19.99 to 39.99 Pa, the plasma electric power of 400 to 1000 W/cm2, the cathode electrode temperature of 50 to 100□, and the wall electrode temperature of 50 to 100□. As described above, Al—Si alloy film 2 is set back from the pattern edge of photoresist 1. However, Ti film 3 and TiN film 4 are etched such that Ti film 3 and TiN film 4 are patterned with the pattern of photoresist 1. Therefore, the surface of TiN film 4, which is the uppermost constituent film of the barrier metal laminate, is exposed in the area, from which Al—Si alloy film 2 has been etched and removed (step (e)).
The photoresist 1 is then burned to ashes and removed as described in FIG. 4(f) (step (f)). Then, a heat treatment is conducted to sinter Ti film 3, TiN film 4 and Al—Si alloy film 2. As Ti film 3, TiN film 4 and Al—Si alloy film 2 are sintered, Si nodules 5 in the aluminum alloy grow as described in FIG. 4(g). The growth of Si nodules 5 is illustrated by larger open circles in FIG. 4(g). Si nodules 5 grow to be larger as the heat treatment temperature is higher and as the heat treatment time is longer (step (g)). Then, SiN film 8 is coated to protect exposed Ti film 3 and TiN film 4 from moistures as described in FIG. 4(h) (step (h)). The polyimide film 7 is then coated to protect the semiconductor device surface as described in FIG. 4(i) (step (i)).
Manufacturing steps, almost identical to the steps (a) through (g) for forming the multilayered electrode structure described above, are described in the following Unexamined Laid Open Japanese Patent Application Publication No. 2004-79582. The semiconductor device, having a multilayered electrode structure that includes an Al—Si alloy film on a barrier metal laminate formed of a Ti film, a TiON film on the Ti film, and a Ti-film on the TiON film, is disclosed in the following Unexamined Laid Open Japanese Patent Application Publication No. 2001-68473.
In the manufacturing process described above in the section of background and in the manufacturing process described in Publication No. 2004-79582, the barrier metal laminate surface is exposed widely. As shown in FIGS. 3(e), 4(f) and 4(g), a widely exposed area is caused in the barrier metal laminate surface due to the removal of Al—Si film 2 therefrom by the wet etching. When the barrier metal laminate exhibits poor moisture resistance, it is necessary to protect the exposed surface area of the barrier metal laminate with a passivation film such as a silicon nitride film (hereinafter referred to as a “SiN film”) that exhibits excellent moisture resistance. Although the SiN film exhibits excellent moisture resistance, defects such as cracks are liable to be caused in the SiN film by the surface stress due to the thermal expansion coefficient difference between the SiN film and the silicon substrate. For a countermeasure against the detect formation, it is necessary to further laminate an organic passivation film such as a polyimide film on the SiN film. As a result, it is necessary for the conventional manufacturing processes to form two passivation films. The formation of two passivation films makes the manufacturing costs soar inevitably. A large stress is exerted to the SiN film surface as described above. When the SiN film is combined a thin silicon wafer, a large warp is caused in the thin silicon wafer. It is impossible to make the warped silicon wafer flow through the subsequent manufacturing steps. The Si nodules caused in the Al—Si alloy film grow to be larger as the heat treatment temperature is higher when the TiN film is on the surface side in the barrier metal laminate. The large Si nodules cause start points in the SiN film, from which cracks are caused in the wire bonding step in the assembly process, further causing failure increase.
In view of the foregoing, it would be desirable to provide a device and method that obviates the problems described above. It would further be desirable to provide a semiconductor device, including a metal electrode wiring laminate, which facilitates improving the moisture resistance of the exposed portion of the barrier metal laminate including a TiN film on the surface side therein. It would also be desirable to provide a semiconductor device, including a metal electrode wiring laminate and one passivation film protecting the metal electrode wiring laminate, which facilitates preventing the cracks due to the Si nodule growth from causing in the aluminum alloy film. It would still further be desirable to provide the method of manufacturing a semiconductor device, including a metal electrode wiring laminate, that facilitates preventing the failures caused by the cracks due to the Si nodule growth from increasing.